Electronics

TIGER

A custom front-end electronics is under development for the readout of CGEM-IT. The analogue readout of CGEM-IT enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 um while loosening the pitch strip to 650 um, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, TIGER (Torino Integrated GEM Electronics for Readout), providing a time and charge measurement and featuring a fully-digital output.

The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates up to 60 kHz per channel.

The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a Charge Sensitive Amplifier and a two-stage complex conjugated pole shapers, dominate the channel intrinsic time jitter, which is less than 5 ns rms.

The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad.

Event data is collected by an off-detector motherboard, where each GEM- readout card (GEM-ROC) handles 4 ASIC carrier PCBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data concentrators are managed by bi-directional fiber optical links.

The CGEM-IT electronics group is also involved in the design of the High Voltage and Low Voltage Distribution Systems. The first is needed to supply all the macro/micro sectors of the CGEM layers allowing the possibility to disconnect a single micro-sector in case of CGEM local short, with a nA sensitivity. The second has been designed to supply TIGER carrier PCBs, allowing the monitoring of voltages and currents together with the capability of cutting power in case of unexpected current draw. Tracker services reliability is the main goal since CGEM-IT will not be accessible after its insertion into the BESIII apparatus.

 

GEMROC

GEMROCs (GEM Read Out Cards) are the modules designed to configure and read the TIGERs.
The core of each GEMROC module (fig. 2.29) is an ALTERA ArriaV GXdevelopment kit hosting the FPGA which is connected to an interface card.

A field-programmable gate array (FPGA) is an integrated circuit which can be configured by a customer or a designer after manufacturing. In order to configure the device, specific hardware description languages are used. FPGAs provide fast and flexible devices which can be configured for specific tasks.
In the GEMROCs, the FPGA is used to:
• Generate the clock for the electronics, synchronizing it among various FPGAs
• Control and regulate TIGER power voltages and drained current
• Send and read the configuration words to the TIGERs
• Receive and interpret the data words19 coming from the TIGERs
• Communicate with the PC or BESIII slow control through a Gigabit Ethernet port
• Build the data packet to be sent through Ethernet or optical connection